As it is well known, the AAL1 is used for the transport of constant bit rate services (CBR) over an ATM network. ATM is a packet communication technology, which introduces variable transfer delays in the transmission and switching of packets. It is therefore more suitable for transmission of bursty traffic such as data, than for CBR traffic. It is however important that an adaptation is made, so that ATM technology can be used for CBR services for reasons of compatibility between existing and future networks.
It is essential for the proper delivery of CBR service traffic in an ATM Network that the clock controlling the destination buffer operates at a frequency exactly matched to the clock of the service signal at the source, in order to avoid loss of information due to buffer over- or under-flow. The clock information in the transport service of the switched circuit is recovered or rebuilt from the periodic arrival of the CBR traffic. This method cannot be directly applied to an ATM network, since each transported cell is affected by the jitter in transfer delay, i.e. the random delay and aperiodic arrival of cells at a destination node. This effect destroys in fact the timing information related to the cell interarrival time.
Clock recovery (or re-build) methods are used in order to eliminate the adverse effect of ATM cell jitter on the transport of CBR service. A number of techniques for a synchronous clock recovery are known. These techniques utilise the fact that a common reference clock is available at both the transmitter and the receiver. The methods of synchronous clock recovery use this common clock in order to encode information on the remote source clock from which it will be possible, on the other side of the network, to recover it. There are four known synchronous methods for the clock recovery in the transport of constant bit rate services over ATM, namely SFET method, TS method, SRTS method and DCTI method. It is also well known that SRTS method incorporates the advantages of the first two ones and it is normally used for AAL1. DCTI method, in turn, ensures better performance of locking time, long term oscillation, immunity of cell loss, code bit rate than SRTS method.
The advantage given by the availability in the transport of CBR services over an ATM network of a receiver which is able to operate both when the said services originate from DCTI transmitters and when they come from SRTS transmitters is apparent.
Thus, it is object to provide a combined receiver which, on one hand, improves performance of SRTS method and, on the other hand, is both SRTS- and DCTI-compatible.
The SRTS and DCTI are summarized below referring to respectively U.S. Pat. No. 5,260,978 and WO-99/48 234. Briefly, the SRTS method is based on of a clock, which is common to the destination node and the source node. At the source node, the timing clock of the service input divided by a factor of an integer N forms residual time stamp (RTS) periods. At the source node the network clock cycles modulo 2 power P are counted, where 2 power P is less than the number of cycles network clock within a RTS period, and P is chosen so that the count uniquely and unambiguously represents the range of possible clock cycles within a RTS period. A RTS is transmitted from the source node to the destination node upon the end of each RTS period. This RTS equals the modulo count of clock cycles at that time. At the destination node, the number of cycles of network clock in each RTS period is determined and a pulse signal is generated by the network clock, in which the period between each pulse equals the number of clock cycles determined in the corresponding RTS period. The frequency of the pulse signal is multiplied by the same factor of an integer N to recover the timing service clock.
In turn, the synchronous DCTI method is characterised in that the square wave related to the frequency of the timing source clock is compared to the square wave related to the frequency of the common network clock. A signal is created by using an exclusive OR in the comparison of the square waves and from such a signal a duty cycle is obtained. A sampling of the duty cycle holds all the information necessary and sufficient to recover the source clock, when the network clock is known and it is transported to the receiver which thus allows the frequency of the source clock to be correctly recovered at the receiver.